Renesas Taps Cadence For ChipGPT-Like AI-Powered Semiconductor Design

Traditional semiconductor chip design typically begins with a lengthy and often arduous process of specification definition, RTL model creation and documentation, before engineering teams can set out on designing actual circuits.

“Ensuring alignment between specification and design is critical, and the cost of verification has increased with the complexity of design functions. Renesas and Cadence have collaborated to develop a novel approach to address this challenge by leveraging generative AI’s LLM capabilities, which significantly reduce the time from specification to final design by efficiently controlling design quality,”I had a chance to ask Mr.

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