The global edge AI hardware market size was valued at $6.88 billion in 2020, and is projected to reach $38.87 billion by 2030 according to Valuates. Determined to catch Synopsys, who won the, Cadence has announced the second generation of its AI intellectual property , the Neo NPU, offering edge System-on-Chip developers a flexible and high-performance alternative.
Cadence has added support for standard Advanced eXtensible Interface , developed by Arm, enabling connectivity to whatever CPU block the customer deems the best fit for the SoC under development. The new IP offers up to 20X higher performance than the first- generation Cadence AI IP, with 2-5X the inferences per second per area and 5-10X the inferences per second per Watt .
The platform offers from 1-80 Trillion Operations Per Second per core and up to hundreds of TOPS for multicore implementations. This flexibility allows customers to select from a wide range of performance levels and latencies to meet the needs of the neural network they need to implement on their SoC, including a wide selection of data types, end-to-end compression, multiple memory levels, and architectures, and the desired width of the AXI bus.
The new platform supports Int4, Int8, Int16, and FP16 data types across a wide set of operations that form the basis of CNN, RNN and transformer-based networks, allowing flexibility in neural network performance and accuracy tradeoffs
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