Despite being handicapped by U.S. sanctions, Huawei and SMIC have a plan to produce 3nm chips

to build 3nm chips using multi-patterning techniques. The multi-patterning techniques are the subject of another patent filed by state-funded chip manufacturing company SiCarrier which, according to, confirms that China's largest foundry SMIC is interested in using SAQP to produce 3nm chips for Huawei using Deep Ultraviolet lithography machines.

Hundreds of chips are built on each wafer and the circuitry patterns etched on each wafer must be thin enough to accommodate the billions of transistors found inside the chips. As the process node number drops, so does the size of the transistors used which allows more to be stuffed inside each chip. Typically, the higher a chip's transistor count, the more powerful and/or energy-efficient that chip is. For example, the 7nm A13 Bionic SoC that powers the iPhone 11 series carries 8.

Experts agree that Huawei and its chip manufacturer SMIC might be able to use SAQP, the previous generation's Deep Ultraviolet Lithography machines, and multiple patterning to produce 5nm chips. However, these experts state that EUV is needed for 3nm silicon. Even then, double-patterning is needed to produce 3nm chips using Low-NA EUV tools.

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